Current zero-anticipating circuit

ABSTRACT

A signal pulse is generated a given time before a symmetric or asymmetric current passes through its zero value by obtaining a clipped voltage which is phase shifted with respect to the initiating current and by differentiating the clipped components to provide a pulse of controllable width and time displacement.

Inventor Ruben D. Gammon [56] References Cited Mnlvern, IP11. UNITED STATES PATENTS P 1 97 2,499,534 3 1950 Sorber 328/209 g d N 2 2,999,925 9/1961 Thomas 328/54 3,209,261 9/1965 Critchcow 328/114 Assgnee I mleml 3,506,852 4 1970 De Hart 307/252 Phmdefllpm, M 3,524,075 8/1970 Matthews 307/232 Primary Examiner-Donald D. Forrer Assistant Examiner David M. Carter CURRENT lEm0 ANTICWATlNG CIRCUIT Attorney-Ostrolenk, Faber, Gerb 84 Soffen 9 Claims, 11 Drawing Fins.

111.5. C11 328/150, ABSTRACT: A signal pulse is generated a given time before a 307/237, 328/109, 328/114,328/117 symmetric or asymmetric current asses through its zero value 1111:. C1 .L W131i 5/20 by obtain ng a clipped o tage which is phase shifted with 11 10101 of Search... 307/232, respect to the initiating current and by differentiating the clipped components to provide a pulse of controllable width and time displacement.

PATENTEDwuvz IBYI 116171807.

SHEET 2 or s CllllltlltlEl l'll ZlEItO-ANTHCIIPATHNG ClllltClUllT This invention relates to a current zero-anticipating circuit and, more particularly, relates to an electronic circuit for generating a pulse at a given time prior to the passage through zero of a current being monitored, whether that current be of symmetric or asymmetric waveshape.

A significant application for circuits of this type is in the operation of synchronous circuit interrupters whose contacts are controlled to separate just prior to a zero crossing of the current wave. As is well known, by separating such contacts prior to zero current, contact wear will be reduced and are extinguishing means is unnecessary. As is also well known, interrupters of this type by and large operate by measuring line current and by delivering an impulse just prior to the occurrence of Zero current in a line being protected, which impulse is used to open an associated circuit breaker or switch. By thus synchronizing the circuit breaking command with the zero point of the current to be broken, the duty of the circuit breaker will be substantially reduced.

Circuit interrupters of this general type are well known. One electronic circuit which performs such operation is disclosed by U.S. Pat. No. 3,315,169 to Nitta et al. This type circuit operates by obtaining a DC voltage proportional to the magnitude of the AC current and by comparing the DC voltage with an AC component similar in waveshape to the current to be broken. When the DC voltage exceeds the AC comparing voltage, the breaking command pulse is generated, at a time in advance of the zero-crossing point of the current. One disadvantage of this arrangement, however, is that the amplitude of the pulse so obtained cannot be readily controlled, nor can the time of advance before zero current be controlled because the point of intersection of the two voltages being compared will considerably vary for currents of different asymmetric waveshape.

A second type of circuit which performs the above described operation operates by developing a first signal which is proportional to the current flowing and a second signal which is proportional to the derivative of the current, and to then add these two signals. The total signal when the current is a pure sine wave will have a waveshape which leads that of the current being monitored by a given angle, depending on the relative magnitudes of the two developed signals. Any suitable circuit can then be used to generate the pulse .when the total signal passes through zero, this occurring at some given time before the current being monitored passes through zero. However, while this circuit (disclosed by U.S. Pat. No. 3,388,361) is suitable for symmetric currents, such circuit has been found to be generally unsuitable when the current monitored is asymmetric.

As will become clear hereinafter, the current zero-anticipating circuit of the present invention provides a totally electronic approach to generating the desired pulse, and at a controllable time prior to the occurrence of a current zero. Not only is the arrangement suitable for construction using solidstate components to increase system reliability, but the arrangement to be described is both impervious to mechanical shock or vibration and is simple and inexpensive to produce. As such, the circuit ofthe invention can be packaged in a very small space, much less than the space occupies by the magnetic circuit improvement of the U.S. Pat. No. 3,388,361 patented device, such improvement being described in U.S. Pat. No. 3,530,303, and assigned to the same assignee as is this instant application. The electronic circuit of this case further represents an improvement over that of U.S. Pat. No. 3,530,303 in its enhanced predictability of design parameters and its relative insensitivity to mechanical abuse.

in accordance with this invention, the novel anticipating circuit operates to generate a pulse at a fixed time before current zero even though the monitored current is asymmetric, but does not generate a pulse if the asymmetric current does not pass through zero. In particular, the circuit operates on the current being monitored to provide an output voltage representative thereof, which is then displaced in time with respect to the original wave by means of a comparison process. That is, the unmodified original voltage wave is compared with a second voltage wave produced by means of filter circuits and phase shift circuits responsive to the original wave signal. The resulting displaced wave is then clipped, preferably at low voltage values, so as to obtain a steep slope at its zero crossing of the time axis. Further amplification and differentiation of this clipped signal yields a pulse of controllable width as well as of controllable time displacement with respect to the input voltage waveform so as to obtain the desired fast rising breaking pulse command at the required instant.

Accordingly, a primary object of the present invention is to provide a current zero-anticipating circuit which electronically produces an output signal a fixed time prior to a current zero, whether the current be of symmetric or asymmetric waveshape.

Another object of the invention is to produce such an output signal before the occurrence of current zero and to suppress such an output signal if an asymmetric current reverses without passing through its zero value.

These and other objects of the invention will be more clearly understood from a consideration of the following description taken in connection with the accompanying drawings in which:

FIG. 1 shows one embodiment of an electronic circuit in accordance with the present invention for providing a pulse of controllable width and time displacement prior to current zero;

FIGS. 211-2 show signal waveforms at various positions within the circuit of FIG. 11;

FIGS. 3 and 4 show response characteristics of circuits of the invention for asymmetric current waveshapes; and

F16. 5 shows a response characteristic for a symmetrical current waveshape.

Referring now to the schematic circuit diagram of FIG. I and to the accompanying signal waveforms of FIG. 2, it will be seen that the electronic circuit of the invention includes three operational amplifier stages 10, 112 and 1141, together with their associated circuitry. The current to be monitored flows in the primary conductor 1100, and is monitored by any one of a number of suitable methods (i.e., by using a current transformer, a linear coupler, or the Hall generator 101, depicted). For purposes of discussion, the current flowing in the conductor 1100 is assumed to be of asymmetric waveshape (FIG. 2a), so that the voltage generated by the exemplary Hall generator device is also of an asymmetric nature (FIG 2b). The output voltage of this generator 101 is then operated upon by the amplifier stages 10 and 12 and their associated elements to provide a voltage wave which is displaced in time (i.e., phase shifted) with respect to the originating wave from the Hall device.

In particular, the first operational amplifier stage is arranged to provide linear amplification of the Hall signal applied to its input terminal 102, with the amplified signal being developed at its output terminal 1031 (FIG. 2c). Operational amplifiers of this type are readily available, as are the corresponding devices of the stages l2 and 114 to be described below. Typical component values for the circuit elements illustrated are also shown in the drawings for proper operation of the invention. ll-iowever, if the magnitude of the input voltage from the current transformer, linear coupler, or Hall generator device 101 is of a magnitude of the order of 5 volts and above, the operational amplifier stage 10 can be omitted from the circuit, and the input signal at terminal 1102 applied directly to the junction point A, previously directly coupled to the amplifier output terminal 103.

As will be noted, the output signal from the first operational amplifier stage 10 is coupled to input terminal 1104 of the amplifier device of the second stage 12, by means of two separate circuit paths. The first circuit path comprises a resistor 16 coupled between junction point A and input terminal 10 i, while the second circuit path includes a phase shifter and DC filter circuit 13, made up of the series combination of a capacitor 18 and a second resistor 20 coupled between point A and ground 40. The voltage developed across resistor 20 is coupled to the amplifier input terminal .104 by means of the remainder of the second circuit path, including a capacitor 22 and resistors 24 and 26 in series connection. As indicated in FIG. 1, resistors 16 and 26 are both made variable. For purposes of the discussion that follows, resistor 16 will hereinafter be referred to as R and the series combination of resistors 24 and 26 will be referred to as R,. Also, capacitor 18 will be henceforth referred to as C and resistor 20 by the notation R,.

At the input terminal 104 of the amplifier of stage 12, the voltage waves coupled through the two circuit paths are added. As will be noted from FIGS. 2c and 2d, that signal which is applied to terminal 104 through the resistive network R is of the same general waveshape as the signal developed at terminal 103 of the amplifier stage 10, while the signal applied through the phase shift and filter network R,C is advanced in time ahead of that signal. This second operational amplifier stage 12 responds to the added signal at the terminal 104 to provide an output signal at the terminal 105 which is time displaced with respect to the input signal from the monitoring device 101 (FIG. 2e), in particular, so that this output signal passes through a zero value prior to the passage through zero of the instantaneous current in conductor 100 (FIG. 2a). As shown, the feedback resistor of the amplifier stage 12 is shown as having a fixed component 28 and a variable component 30. These resistive elements 28 and 30 in series connection will hereinafter be referred to by the notation R The output signal developed by the second operational amplifier stage 12 is then coupled to the input terminal 106 ofthe amplifier device of the third stage by means of a clipping circuit. In particular, this clipping circuit includes a pair of rectifier diodes, 32, 34 oppositely poled and parallel connected, as shown, between a pair of coupling resistors 36 and 38 and ground. By employing rectifier components of silicon composition, for example, the clipping of the voltage waveform can be done at a low value (approximately 0.6 volts) so that a steep slope may be obtained at the zero crossing of the wave on the time axis (FIG. 2]). This clipped signal is developed at the junction point C of the clipping circuit, and is coupled by way of the resistor 38 to the amplifier stage I4.

The amplifier device of the stage 14, like that of the stage 10, is selected to linearly amplify an applied input signal and to provide a corresponding output in response at its terminal 108. Such signal is then differentiated by an RC network including resistor 42 and capacitor 44, on the one hand, and resistor 46 and capacitor 48 on the other hand. The pulse output developed at terminal 110, across the resistor 46, represents a pulse of controllable width as well as time displacement in relation to the input voltage from the monitoring device 101 (FIG. 2g). In particular, it has been found that the width of the pulse obtained can be controlled by means of a variable resistive component 50, being included in the feedback network of the amplifier device of stage 14 in conjunction with a fixed series connected resistor 52. Similarly, it has been found that the time displacement can be controlled by proper selection of values for the resistive elements R R R,, R, and for the capacitor C,. As noted, the positive and negative going pulses developed at terminal 110 substantially correspond to the discontinuities in the otherwise alternating clipped signal waveform. Each of these pulses-the positive-going pulse initiated by the discontinuity preceding the rising portion of the clipped signal waveform and the negative-going pulse initiated by the discontinuity preceding the falling portion of the clipped waveform-are shown to occur at a point in time ahead of the zero crossing of the added signal from the amplifier stage 12. No corresponding pulses are seen to be developed, but instead are substantially suppressed, where the asymmetric wave reverses before crossing the zero current axis (75, in FIG. 2g).

Mathematically, it can be shown that the response of the electronic circuit of FIG. 1 to an asymmetrical current of the form:

It will be understood in this respect that E represents the magnitude of the voltage wave developed at output terminal 105 of the second amplifier stage 12, V, equals the magnitude of the applied voltage from the Hall device 101, and X/R represents the impedance to resistance ratio of the system. Also, (0 represents the frequency of the applied signal in radians, D represents the degree of phase shift employed, I,,, equals the maximum value of primary conductor current flowing and C represents the capacitance of the system illustrated. Using the above expression and the values of the components shown in the drawings, the response of the electronic circuit device of the invention was calculated with different X/R system values with the results being shown in FIGS. 3-5.

In particular, it will be noted that FIG. 3 shows the typical response for an asymmetric current for a system where the X/R ratio equals 150, where the primary current is of such a 30 magnitude that its first peak has sufficient energy to just cross the zero current axis. The energy of the breaking pulse thus developed is seen to be substantially less than corresponding pulses developed just prior to zero crossings of current waveforms of increased peak value. Where the wave reverses direction before a zero crossing occurs, the energy contained in this pulse will be insufficient to command breaking of the synchronous circuit-protecting device. However, in all respects, it will be seen that the output pulse generated is developed prior to the occurrence of a zero crossing (FIG. 40 2 FIG. 4 similarly shows the response for an asymmetric current of greater input amplitude, and for a system where the X/R ratio equals l0. As before, it will be seen that the output pulses are generated prior to the occurrence ofa current zero, and are of substantially increased energy content.

FIG. 5, likewise, shows the response obtained for a symmetrical primary current waveform. As will be seen, the output pulses here too are developed prior to the occurrence of a zero crossing of the current wave form. With the values selected for the components of the circuit described, and with the system ratios and amplitude values assumed, it will be noted that the breaking command precedes a zero current crossing with the waveforms of FIG. 3 by some 2-3 milliseconds while the time of advance in the FIGS. 4 and arrangement are approximately 2 milliseconds in each case.

Although there has been described a preferred embodiment of this novel invention, many variations and modifications will now be apparent to those skilled in the art. Therefore, this invention is to be limited, not by the specific disclosure herein, but only by the appending claims.

Iclaim:

1. The embodiments of the invention in which an exclusive privilege or property is claimed are defined as follows:

1. A current zero-anticipating circuit for generating a signal at a fixed time prior to the occurrence of a current zero in an electrical circuit comprising:

first means coupled to said electrical circuit for generating a first signal proportional to the instantaneous current flowing in said electrical circuit;

second means coupled to said electrical circuit for generating a second signal which is phase shifted with respect to said first signal by a given lead angle;

third means coupled to said first and second means for adding said first and second signals together in forming a third signal, whereby said third signal passes through a zero value at a fixed time prior to the passage of said instantaneous current through zeroj fourth means for clipping positive and negative portions of said third signal to provide a fourth signal having discontinuities caused by such positive and negative clipping actions which precede in time, the zero value crossing of said third signal; and

fifth means coupled to said fourth means for generating output signals substantially in time synchronism with said discontinuities of said fourth signal.

2. The current iero anticipating circuitof claim 1 wherein said fifth means generates output pulses of fixed advance angle prior to a current zero of an asymmetric current in said electrical circuit and wherein said output pulses are substantially suppressed when an asymmetric current in said circuit reverses without passing through a zero current value.

3. The current zero-anticipating circuit of claim 1 wherein said fourth means includes a pair of oppositely poled parallelconnected rectifier diodes coupled to an output terminal of said third means for respectively clipping positive and negative portions of said third signal developed thereat.

4. The current zero-anticipating circuit of claim 1 wherein said fifth means includes a differentiating circuit having resistance and capacitance for delivering output pulses of opposite polarity substantially in time synchronism with said discontinuities of said fourth signal.

5. The current zero-anticipating circuit of claim 1 wherein said first means includes a substantially resistive network serially coupled with apparatus for monitoring said instantaneous current flow and for providing a voltage signal in response thereto and wherein said second means includes a phase shift and DC filter circuit sefially co upled with said apparatus for monitoring said instantaneous current flow.

6. The current zero-anticipating circuit of claim 5 wherein said monitoring apparatus comprises a Hall generator.

7. The current zero-anticipating circuit of claim 5 wherein the substantially resistive network of said first means is coupled to said monitoring apparatus by an operational amplifier connected to linearly amplify said provided voltage signal, and wherein the phase shift and DC filter circuit of said second means is similarly coupled by an operational amplifier to said same apparatus.

8. The current zero-anticipating circuit of claim 5 wherein said fifth means is coupled to said fourth means by an operational amplifier connected to linearly amplify said fourth signal.

9. The current zero-anticipating circuit of claim 1 wherein said first means comprises a resistor serially coupled to a Hall generator device responsive to current flow in said electrical circuit via an operational amplifier, wherein said second means includes a phase shift and DC filter circuit coupled to said Hall device through said same operational amplifier, wherein the signal waveforms coupled through said resistor and through said phase shift and DC filter circuit are linearly amplified by an operational amplifier comprising said third means, wherein an output terminal of said third means is coupled to a pair of oppositely poled, parallel-connected rectifier diodes comprising said fourth clipping means, and wherein said fifth means includes a differentiating circuit coupled to: receive said fourth signal via an operational amplifier con-j nected to linearly amplify said fourth signals together with its? discontinuities. 

1. The embodiments of the invention in which an exclusive privilege or property is claimed are defined as follows:
 1. A current zero-anticipating circuit for generating a signal at a fixed time prior to the occurrence of a current zero in an electrical circuit comprising: first means coupled to said electrical circuit for generating a first signal proportional to the instantaneous current flowing in said electrical circuit; second means coupled to said electrical circuit for generating a second signal which is phase shifted with respect to said first signal by a given lead angle; third means coupled to said first and second means for adding said first and second signals together in forming a third signal, whereby said third signal passes through a zero value at a fixed time prior to the passage of said instantaneous current through zero; fourth means for clipping positive and negative portions of said third signal to provide a fourth signal having discontinuities caused by such positive and negative clipping actions which precede in time, the zero value crossing of said third signal; and fifth means coupled to said fourth means for generating output signals substantially in time synchronism with said discontinuities of said fourth signal.
 2. The current zero-anticipating circuit of claim 1 wherein said fifth means generates output pulses of fixed advance angle prior to a current zero of an asymmetric current in said electrical circuit and wherein said output pulses are substantially suppressed when an asymmetric current in said circuit reverses without passing through a zero current value.
 3. The current zero-anticipating circuit of claim 1 wherein said fourth means includes a pair of oppositely poled parallel-connected rectifier diodes coupled to an output terminal of said third means for respectively clipping positive and negative portions of said third signal developed thereat.
 4. The current zero-anticipating circuit of claim 1 wherein said fifth means includes a differentiating circuit having resistance and capacitance for delivering output pulses of opposite polarity substantially in time synchronism with said discontinuities of said fourth signal.
 5. The current zero-anticipating circuit of claim 1 wherein said first means includes a substantially resistive network serially coupled with apparatus for monitoring said instantaneous current flow and for providing a voltage signal in response thereto and wherein said second means includes a phase shift and DC filter circuit serially coupled with said apparatus for monitoring said instantaneous current flow.
 6. The current zero-anticipating circuit of claim 5 wherein said monitoring apparatus comprises a Hall generator.
 7. The current zero-anticipating circuit of claim 5 wherein the substantially resistive network of said first means is coupled to said monitoring apparatus by an operational amplifier connected to linearly amplify said provided voltage signal, and wherein the phase shift and DC filter circuit of said second means is similarly coupled by an operational amplifier to said same apparatus.
 8. The current zero-anticipating circuit of claim 5 wherein said fiftH means is coupled to said fourth means by an operational amplifier connected to linearly amplify said fourth signal.
 9. The current zero-anticipating circuit of claim 1 wherein said first means comprises a resistor serially coupled to a Hall generator device responsive to current flow in said electrical circuit via an operational amplifier, wherein said second means includes a phase shift and DC filter circuit coupled to said Hall device through said same operational amplifier, wherein the signal waveforms coupled through said resistor and through said phase shift and DC filter circuit are linearly amplified by an operational amplifier comprising said third means, wherein an output terminal of said third means is coupled to a pair of oppositely poled, parallel-connected rectifier diodes comprising said fourth clipping means, and wherein said fifth means includes a differentiating circuit coupled to receive said fourth signal via an operational amplifier connected to linearly amplify said fourth signals together with its discontinuities. 